This application claims priority to Korean Application No. 2001-3889, filed Jan. 27, 2001, the disclosure of which is hereby incorporated herein by reference.
The present invention relates to integrated circuits and methods of operation thereof, and more particularly, to boost circuits and methods of operating thereof.
Many integrated circuit devices internally utilize higher voltages than are supplied by an external power source. For example, a memory device, such as an electrically erasable and programmable read-only memory (EEPROM) or flash EEPROM, may use a higher reading voltage than is supplied by the power supply voltage applied to the memory device. This high voltage is typically generated by a voltage boost circuit (or multiplier) integrated with the memory circuit.
Many conventional voltage boost circuits use a charge pump that charges a capacitor to develop a boosted voltage. The size of the capacitor is typically determined by the frequency of an available internal clock signal used to operate the charge pump. For example, if the frequency of the internal clock signal is relatively low, an off-chip capacitor having a large capacitance may be required to achieve the desired voltage boost.
If an off-chip capacitor is used for the voltage boost circuit, the potential at the chip pad that forms a junction between the chip and the capacitor may become higher than a source voltage supplied to the chip. This may necessitate use of an additional circuit attached to the chip pad. Also, if the voltage boost circuit operates in a frequency range lower or higher than the designed frequency, the boosted voltage value may be changed.
Some conventional voltage boost circuits include an oscillator circuit that receives an external control signal and generates an internal clock signal, and a charge pump circuit that receives the internal clock signal and generates a boosted voltage responsive thereto. Some conventional voltage boost circuits may not control the boosted output voltage particularly well, and may produce unacceptable voltage ripple.
According to some embodiments of the present invention, a boost circuit, such as might be used to generate a boosted voltage in an integrated circuit device, (e.g., an EEPROM) is provided. The boost circuit includes a plurality of charge pump circuits having outputs connected in common and that generate current pulses responsive to respective phased periodic signals. The boost circuit further includes a multi-phase periodic signal generator circuit that generates the phased periodic signals such that they have respective different phases. In particular, the multi-phase periodic signal generator circuit may generate the phased periodic signals such that current pulses produced by the plurality of charge pump circuits are distributed over a repeating cycle.
In some embodiments, the multi-phase input signal generator circuit comprises a control signal generator circuit that produces a control signal responsive to a voltage produced by the plurality of charge pump circuits, and an oscillator circuit that generates the plurality of phased periodic signals responsive to the control signal. For example, the control signal generator circuit may produce the control signal responsive to a comparison of the voltage to a desired value. In some embodiments, the control signal generator circuit produces a control voltage responsive to a comparison of the voltage produced by the plurality of charge pump circuits to a desired value, and the oscillator circuit comprises a voltage controlled oscillator circuit that varies a frequency of the phased periodic signals responsive to the control voltage.
Related operating methods are also described.